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Registers

x86-64

RFLAGS Register

The 64-bit RFLAGS register holds status, control, and system flags that arithmetic and logical instructions set — conditional jumps and SETcc read these bits.

RFLAGS is the 64-bit extension of EFLAGS (32-bit) / FLAGS (16-bit). Most bits are reserved; the meaningful bits for userspace reverse engineering are the status flags and the direction flag.

Status flags

BitAbbreviationNameSet when
0CFCarry FlagUnsigned overflow / borrow; rotate shift-out bit
2PFParity FlagLow byte of result has even number of 1-bits
4AFAuxiliary CarryCarry out of bit 3 (BCD arithmetic)
6ZFZero FlagResult is zero
7SFSign FlagMSB of result is 1 (result is negative)
11OFOverflow FlagSigned arithmetic overflow

Control flag

BitAbbreviationNameMeaning
10DFDirection Flag0 = string ops auto-increment RSI/RDI; 1 = decrement

Set with STD; cleared with CLD. Should be 0 on function entry per ABI.

System flags (user-mode relevance)

BitAbbreviationNameNotes
8TFTrap FlagSingle-step mode — raises #DB after each instruction
9IFInterrupt FlagEnables hardware interrupts (Ring 0 only)
16RFResume FlagSuppresses #DB on the instruction resuming after a debug exception
21IDID FlagCPUID support (writeable = CPUID available)

Instructions that read/write RFLAGS

InstructionEffect
PUSHFQ / POPFQPush/pop RFLAGS onto the stack
LAHFLoad SF/ZF/AF/PF/CF into AH
SAHFStore AH into SF/ZF/AF/PF/CF
SETccSet byte to 0 or 1 based on condition (e.g. setz al)

Reverse-engineering notes

  • The four most important flags for control flow are ZF, CF, SF, OF — these drive every Jcc you will encounter.
  • After CMP a, b the state is: ZF=1 if equal; CF=1 if a < b (unsigned); SF≠OF if a < b (signed). This is worth memorising.
  • TF=1 causes a single-step exception after every instruction — the mechanism behind single-step debugging. Some anti-debug tricks detect TF by catching the resulting SIGTRAP.
  • LAHF/SAHF are used in performance-sensitive code to save/restore only the low flag byte without a full PUSHFQ.